There is market pressure to reduce the sizing of products while increasing reliability and functionality. To accommodate this demand, industries are consistently attempting to shrink printed circuit boards (PCBs). However, the options for substrates, components and circuit trace widths available for manufacturing are reaching a plateau.
With the introduction of Benchmark Lark Technology’s miniaturization techniques, our customers can now shrink trace widths, embed bare silicon die and components within a circuit board, utilize a via in pad technique and substitute standard substrates for high-performance low-loss materials such as Liquid Crystal Polymer (LCP).
By utilizing a Laser Direct Imagining (LDI) machine (one of only two that exist inside of the US) we are capable of manufacturing less than 1mil (25 micron) circuit lines and spaces. Lark also has the unique capability to fabricate 10+ circuit board layers utilizing LCP. Demand for lightweight, small PCBs to meet customer desires continues to escalate. Lark recognizes where the future is heading and offers innovative miniaturization solutions to address this widespread necessity.
Benchmark is helping our partners overcome technology barriers with our expertise in multiple methods of electronics miniaturization and high-precision microelectronics assembly. At Benchmark, our engineering toolkit includes miniaturization procedures optimized for various use cases, allowing us to select the best method to reach the customer’s miniaturization goals.
Our advanced manufacturing techniques expand design options available by enabling narrower lines and spaces, re-partitioning of boards to combine components and thin, flexible substrates for thinner multi-layer boards. We scale production using our capabilities in microelectronics, SMT or even hybrid electronics. No matter which tools we use, the outcome is the same: a product that is optimized for how it will be used, not limited by the electronics it contains.
Electronics miniaturization uses a set of circuit design procedures that reduce the size of the electronics in a device by making them denser and in some cases partitioning them differently to reduce the overall number of components. Increasing density requires both very fine lines of conductive material, and effective, but very fine lines of insulator between them to avoid shorts. For this reason, an engineering team needs to be familiar with the limitations of the manufacturing process and materials they are working with, and traditional manufacturing methods can’t meet these goals in all cases. To achieve High-Density Interconnect (HDI) circuit topologies in high-layer count boards for the smallest total electronics package, specialized manufacturing processes are required, such as those offered by Benchmark Lark RF Technology.
When the smallest, lightest circuits are needed, Benchmark Lark RF Technology can produce ultra-HDI circuits with one mil lines and spaces in up to 10+ layers of board using novel substrates and production techniques to arrive at 3-Dimensional Heterogeneous Integrated circuits (3DHI). True 3DHI circuits open a set of new options in electronics partitioning, allowing the combination of previously separate components without interference to drastically reduce the overall footprint.